Hybrid measurement-based WCET analysis using instrumentation point graphs

Precise operation of real-time systems depends on functionally correct computations that are delivered within imposed timing constraints. These temporal requirements are often modelled and verified assuming a priori knowledge of the Worst-Case Execution Time (WCET) of each task. Due to complexities resolving the actual WCET, estimates normally suffice. These estimates should be safe, so as not to compromise temporal correctness, and accurate, in order to maximise the often limited system resources. The aim of WCET analysis is to therefore compute a WCET estimate that is the actual WCET. To date, the predominant research direction has been static analysis, which builds both program and processor models, and can therefore provide rigourous proofs regarding safety. However, the real-time sector is being infiltrated by more advanced processors that complicate processor modelling sufficiently so that simplfying assumptions are needed. Such assumptions lead to varying degrees of overestimation, depending on processor configuration. On the other hand, current end-to-end testing practices most often employed in industry do not target WCET estimation and could therefore underestimate unless the longest path is triggered. This is further complicated by advanced processors as the WCET can depend on a rare sequence of events at the architectural level, and not necessarily on the input causing the greatest number of operations. In this thesis, we combine the relative strengths of testing and static analysis through a Hybrid Measurement-Based (HMB) framework based on a new program model, the Instrumentation Point Graph (IPG). We present an algorithm to construct the IPG from a reducible CFG* an augmented Control Flow Graph (CFG) such that arbitrary irreducible IPG loops are identified on the fly. Using these structural properties, we